1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same.
2. Description of the Related Art
Along with the micro-fabrication and high integration of semiconductor devices, the reduction of memory cell size is advancing. However, the capacitance (storage capacitance: Cs) of capacitors included in the memory cell cannot be too low, in light of sensitivity and soft error.
For this reason, capacitors having a three-dimensional (3D) structure are required. In a 3D structure, a dielectric film is formed to cover upper and side surfaces of a storage node electrode (SN electrode). In addition, a plate electrode (PL electrode) is formed to cover the dielectric film. As described above, the capacitors are formed using the side of the storage node electrode; therefore, the capacitance can be made large even if the memory cell area is reduced.
However, when the reduction of memory cell advances, the space width between adjacent SN electrodes becomes narrow. For this reason, there is a problem that it is difficult to form the dielectric film and the PL electrode in the space between SN electrodes. In general, the width of the SN electrode and the space width between SN electrodes are determined by design rule. When the memory cell area is reduced, the problem described above is very serious.
The following proposal has been made as the conventional technique in JPN. PAT. APPLN. KOKAI Publication No. 2001-189434. According to the proposal, the SN electrode is arranged obliquely to the bit line direction. The structure described above is employed, and thereby, the SN electrode becomes long, that is, the side length of the SN electrode becomes long, so that capacitance can be increased. However, the proposal dose not consider the space width between SN electrodes; therefore, it is impossible to solve the problem described above.
As seen from above, when the memory cell area is reduced, it is difficult to prevent the reduction of capacitance, and to securely form the dielectric film and the PL electrode in the space between SN electrodes. Therefore, it is difficult to obtain a semiconductor device, which includes a capacitor having high reliability and performance.